加拿大华人论坛 加拿大生活信息opening:New Grad Mixed Signal DSP Engineer



在加拿大


email me your resume if seriously interested at [email protected]: New Grad Mixed Signal DSP Engineer - 1105830001About the Job:Position: DSP DesignerDivision: MSDG Location: Burnaby, BCThe Mixed-Signal Design Group (MSDG) provides IP to various business units within the company, with a current focus on DSP-based SERDES. These SERDES designs incorporate GHz-rate DSP blocks with adaptive equalization, timing recovery, and diagnostics. The DSP team (a sub-division of MSDG) is responsible for the design, verification, synthesis, and lab support of these blocks.The DSP team also works on designs that utilize Maximum Likelihood Estimation (MLE), Forward Error Correction (FEC), Fourier Transforms (FFTs/IFFTs), encoding/decoding, network timing, digital PLLs, and a variety of control loops like Automatic Gain Control (AGC), Automatic Frequency Control (AFC), etc.We are looking for a bright DSP designer for SERDES projects. There will opportunities to explore other areas too.Responsibilities:• Architectural definition, design, and implementation of hardware DSP blocks o Feasibility studies in Matlab/Simulink o RTL development in VHDL/Verilog o Block-level verification in Matlab/Verilog o Documentation, synthesis, back-end support• Support development from specification through to production by interacting with engineers in Validation, Applications, Product Development, Marketing and Production Engineering• Debug issues found in the company and customer labs• Represent company at conferences and customer eventsMandatory Qualifications: The minimum requirements for this job are:• Education: advanced degree in EE (BASc, MASc, or PhD)• A background in DSP design• Proficiency with Matlab and Simulink• The ability to work autonomously• Excellent written and oral communications skills• Ability to quickly ramp up on new technologiesOther Qualifications:The following qualifications are assets for the candidate, but not mandatory:• Experience with SERDES designs• Bit Error Rate (BER) estimation• Decision Feedback Equalizers (DFEs) and Feed Forward Equalizers (FFEs) design• Clock recovery loop design• Experience with all phases of digital design (specification, RTL coding, verification, synthesis, layout)• Experience with high speed timing (500MHz+)• Experience with power optimization of digital designs• Proficiency with C/C++• Worked on a product that has shipped in significant quantity• Comfort within the Unix/Linux O/S• Experience with customer interaction and support

  ·中文新闻 2024 年美国大选结果:特朗普获胜可能会让澳大利亚经济损失
·中文新闻 2024 年美国大选结果:特朗普是新的罗纳德·里根 - 没有美德

加拿大生活信息-加拿大

加拿大老人金

华人网大家好: 我父母來了加拿大都已經十年啦,開始準備申請加拿大老人金。 本人對這項福利都還好迷茫,希望各位多多指教, 多謝!本人父母居住加拿大已經十年,過去十年,沒有工作 ...

加拿大生活信息-加拿大

不想在温哥华了想去农村

华人网不想在大城市了,从出生到现在一直在大城市,来到温哥华,这房价和工资的不对等更搞得无法呼吸。来加拿大又不是奔着这些来的,加上本人很佛系,现在就梦想找一份WFH的工作到乡 ...

加拿大生活信息-加拿大

从首尔转机回加拿大

华人网今天送老公先回加拿大,从沈阳出发经首尔当天飞多伦多。 给老公买的是沈阳至首尔 大韩航空的 从首尔到多伦多 加拿大航空 行李在沈阳可以直挂到多伦多 给了两段航程的登机牌 行李 ...

加拿大生活信息-加拿大

赏花:蒲公英晚期?

华人网郁金香正在凋谢,蒲公英也进入最后的一搏。这个时候,她们已经不像小黄花绽放时那么可爱了(应该说多数人是这么感觉的),但仔细观赏,我还是很喜欢的。心中喜乐,到处都是美 ...